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as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 1 features ? ultra high speed asynchronous operation ? fully static, no clocks ? multiple center power and ground pins for improved noise immunity ? easy memory expansion with ce\ and oe\ options ? all inputs and outputs are ttl-compatible ? single +5v power supply +/- 10% ? data retention functionality testing ? cost effcient plastic packaging ? extended testing over -55oc to +125oc for plastics ? plastic 36 pin psoj is fully compatible with the ceramic 36 pin soj and offered in lead free fnish ? tsopii in copper lead frame for superior thermal performance 2 ? rohs compliant options available options marking ? timing 12ns access -12 15ns access -15 17ns access -17 20ns access -20 25ns access -25 35ns access -35 45ns access -45 ? operating temperature ranges full military (-55 o c to +125 o c) /883c military (-55 o c to +125 o c) xt industrial (-40 o c to +85 o c) it ? package(s) ceramic lcc ec ceramic flatpack f plastic soj (lead free) 1 dj ceramic soj (attached formed lead) ecj ceramic soj soj plastic tsopii (44pin, 400mil) dgc 2 plastic tsopii (rohs compliant) dgcr 2 ? 2v data retention/low power 3 l notes: 1. pb fnish also available, contact factory 2. contact factory for copper lead frame products 3. not available for parts in dgc & dgcr packages. pin assignment (top view) available as military specifications ?smd 5962-95600 ?smd 5962-95613 ?mil-std-883 512k x 8 sram high speed sram with revolutionary pinout sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 1 austin semiconductor, inc. features ? ultra high speed asynchronous operation ? fully static, no clocks ? multiple center power and ground pins for improved noise immunity ? easy memory expansion with ce\ and oe\ options ? all inputs and outputs are ttl-compatible ? single +5v power supply +/- 10% ? data retention functionality testing ? cost efficient plastic packaging ? extended testing over -55oc to +125oc for plastics ? plastic 36 pin psoj is fully compatible with the ceramic 36 pin soj and offered in lead free finish ? 3.3v future offering options marking ? timing 12ns access -12 15ns access -15 17ns access -17 20ns access -20 25ns access -25 35ns access -35 45ns access -45 ? operating temperature ranges full military (-55 o c to +125 o c) /883c military (-55 o c to +125 o c) xt industrial (-40 o c to +85 o c) it ? package(s) ceramic lcc ec ceramic flatpack f plastic soj (lead free)* dj ceramic soj (attached formed lead) ecj ceramic soj soj * pb finish also available, contact factory ? 2v data retention/low power l pin assignment (top view) 36-pin soj (dj, ecj & soj) 36-pin clcc (ec) general description the as5c512k8 is a high speed sram. it offers flexibility in high-speed memory applications, with chip enable (ce\) and output enable (oe\) capabilities. these features can place the outputs in high-z for additional flexibility in system design. writing to these devices is accomplished when write enable (we\) and ce\ inputs are both low. reading is accomplished when we\ remains high and ce\ and oe\ go low. as a option, the device can be supplied offering a reduced power standby mode, allowing system designers to meet low standby power requirements. this device operates from a single +5v power supply and all inputs and outputs are fully ttl-compatible. the as5c512k8dj offers the convenience and reliability of the as5c512k8 sram and has the cost advantage of a durable plastic. the as5c512k8dj is footprint compatible with 36 pin csoj package of the smd 5692-95600. 36-pin flat pack (f) available as military specifications ?smd 5962-95600 ?smd 5962-95613 ?mil-std-883 512k x 8 sram high speed sram with revolutionary pinout for more products and information please visit our web site at www.austinsemiconductor.com 44-pin tsopii (dgc & dgcr) 2 integrated silicon solution, inc. ? www.issi.com rev. b 03/04/2008 is61c5128al/as is64c5128al/as pin descriptions a0-a18 address inputs ce chip enable input oe output enable input we write enable input i/o0-i/o7 bidirectional ports v dd power gnd ground nc no connection 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 a0 a1 a2 a3 a4 ce i/o0 i/o1 v dd gnd i/o2 i/o3 we a5 a6 a7 a8 a9 nc a18 a17 a16 a15 oe i/o7 i/o6 gnd v dd i/o5 i/o4 a14 a13 a12 a11 a10 nc high speed (is61/64c5128al) pin configuration 36-pin soj (400-mil) 44-pin tsop (type ii) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 nc nc a0 a1 a2 a3 a4 ce i/o0 i/o1 v cc gnd i/o2 i/o3 we a5 a6 a7 a8 a9 nc nc nc nc nc a18 a17 a16 a15 oe i/o7 i/o6 gnd vcc i/o5 i/o4 a14 a13 a12 a11 a10 nc nc nc sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 1 austin semiconductor, inc. features ? ultra high speed asynchronous operation ? fully static, no clocks ? multiple center power and ground pins for improved noise immunity ? easy memory expansion with ce\ and oe\ options ? all inputs and outputs are ttl-compatible ? single +5v power supply +/- 10% ? data retention functionality testing ? cost efficient plastic packaging ? extended testing over -55oc to +125oc for plastics ? plastic 36 pin psoj is fully compatible with the ceramic 36 pin soj and offered in lead free finish ? 3.3v future offering options marking ? timing 12ns access -12 15ns access -15 17ns access -17 20ns access -20 25ns access -25 35ns access -35 45ns access -45 ? operating temperature ranges full military (-55 o c to +125 o c) /883c military (-55 o c to +125 o c) xt industrial (-40 o c to +85 o c) it ? package(s) ceramic lcc ec ceramic flatpack f plastic soj (lead free)* dj ceramic soj (attached formed lead) ecj ceramic soj soj * pb finish also available, contact factory ? 2v data retention/low power l pin assignment (top view) 36-pin soj (dj, ecj & soj) 36-pin clcc (ec) general description the as5c512k8 is a high speed sram. it offers flexibility in high-speed memory applications, with chip enable (ce\) and output enable (oe\) capabilities. these features can place the outputs in high-z for additional flexibility in system design. writing to these devices is accomplished when write enable (we\) and ce\ inputs are both low. reading is accomplished when we\ remains high and ce\ and oe\ go low. as a option, the device can be supplied offering a reduced power standby mode, allowing system designers to meet low standby power requirements. this device operates from a single +5v power supply and all inputs and outputs are fully ttl-compatible. the as5c512k8dj offers the convenience and reliability of the as5c512k8 sram and has the cost advantage of a durable plastic. the as5c512k8dj is footprint compatible with 36 pin csoj package of the smd 5692-95600. 36-pin flat pack (f) available as military specifications ?smd 5962-95600 ?smd 5962-95613 ?mil-std-883 512k x 8 sram high speed sram with revolutionary pinout for more products and information please visit our web site at www.austinsemiconductor.com sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 2 sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 2 austin semiconductor, inc. functional block diagram truth table mode oe\ ce\ we\ i/o power standby x h x high-z standby read l l h q active not selected h l h high-z active write x l l d active s n o i t c n u f n i p 8 1 a - 0 as t u p n i s s e r d d a \ e we l b a n e e t i r w \ e ce l b a n e p i h c \ e oe l b a n e t u p t u o o / i 0 o / i - 7 s t u p t u o / s t u p n i a t a d v c c r e w o p v s s d n u o r g c nn o i t c e n n o c o n x = don?t care vcc gnd input buffer 4,194,304-bit memory array 1024 rows x 4096 columns i/o controls column decoder row decoder *power down ce\ oe\ we\ dq8 dq1 a0-a18 *on the low voltage data retention option. general description the as5c512k8 is a high speed sram. it offers fexibility in high-speed memory applications, with chip enable (ce\) and output enable (oe\) capabilities. these features can place the outputs in high-z for additional fexibility in system design. writing to these devices is accomplished when write enable (we\) and ce\ inputs are both low. reading is accomplished when we\ remains high and ce\ and oe\ go low. as a option, the device can be supplied offering a reduced power standby mode, allowing system designers to meet low standby power requirements. this device operates from a single +5v power supply and all inputs and outputs are fully ttl-compatible. the as5c512k8dj offers the convenience and reliability of the as5c512k8 sram and has the cost advantage of a durable plastic. the as5c512k8dj is footprint compatible with 36 pin csoj pack - age of the smd 5692-95600. tsopii with copper lead frame offers superior thermal performance. sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 3 absolute maximum ratings* voltage on vcc supply relative to vss vcc ....................................................................-.5v to +7.0v storage temperature (plastic)......................-65 c to +150 c storage temperature (ceramic)...................-55c to +125c short circuit output current (per i/o)........................20ma voltage on any pin relative to vss.................-.5v to vcc+1v maximum junction temperature**..............................+150 c power dissipation ................................................................1w *stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specifcation is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. ** junction temperature depends upon package type, cycle time, loading, ambient temperature and airfow, and humidity. electrical characteristics and recommended dc operating conditions (-55 o c < t a < +125 o c & -40 o c < t a < +85 o c ; vcc = 5v + 10%) description sym -12 -15 -17 -20 -25 -35 -45 units notes i ccsp 100 100 100 90 90 80 70 ma 3 "l" version only i cclp 75 75 75 65 65 60 50 ma i sbtsp 20 20 20 20 20 20 20 ma "l" version only i sbtlp 10 10 10 10 10 10 10 ma i sbcsp 15 15 15 15 15 15 15 ma "l" version only i sbclp 5555555 ma max power supply current: standby conditions we\=ce\ v ih , all other inputs < v il , vcc = max, f = 0, outputs open ce\ > vcc -0.2v; vcc = max v in < vss +0.2v or v in > vcc -0.2v; f = 0 power supply current: operating description conditions sym min ma x units notes input high (logic 1) voltage v ih 2.2 vcc +0.5 v 1 input low (logic 0) voltage v il -0.5 0.8 v 1, 2 input leakage current 0v < v in < vcc i li -2 2 a output leakage current output(s) disabled 0v < v out < vcc i lo -2 2 a output high voltage i oh = -4.0 ma v oh 2.4 --- v 1 output low voltage i ol = 8 ma v ol --- 0.4 v 1 supply voltage v cc 4.5 5.5 v 1 capacitance paramete r conditions symbol ma x units notes input capacitance c i 8 pf 4 output capactiance co 10 pf 4 t a = 25 o c, f = 1mhz v in = 0 sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 4 electrical characteristics and recommended ac operating conditions (-55 o c < t a < +125 o c or -40 o c to +85 o c; vcc = 5v + 10%) min ma x min ma x min ma x min ma x min ma x min ma x min ma x read cycle read cycle time t rc 12 15 17 20 25 35 45 ns address access time t aa 12 15 17 20 25 35 45 ns chip enable access time t ace 12 15 17 20 25 35 45 ns output hold from address change t oh 2222222 ns chip enable to output in low-z t lzce 2 2 2 2 2 2 2 ns 4, 6, 7 chip disable to output in high-z t hzce 0 6.5 0 7 0 8 0 8 0 10 0 15 0 20 ns 4, 6, 7 output enable acess time t aoe 7 8 8 10 12 15 25 ns output enable to output in low-z t lzoe 0 0 0 0 0 0 0 ns 4, 6, 7 output disable to output in high-z t hzoe 0 6.5 0 7 0 8 0 8 0 10 0 15 0 20 ns 4, 6, 7 write cycle write cycle time t wc 12 15 17 20 25 35 45 ns chip enable to end of write t cw 12 15 16 17 20 30 35 ns address valid to end of write t aw 12 15 16 17 20 30 35 ns address setup time t as 0000000 ns address hold from end of write t ah 0000000 ns write pulse width t wp 12 15 16 17 20 30 35 ns data setup time t ds 6.5 7 9 10 12 20 25 ns data hold time t dh 0000000 ns write disable to output in low-z t lzwe 0 0 0 0 0 0 0 ns 4, 6, 7 write enable to output in high-z t hzwe 0 6.5 0 7 0 8 0 8 0 10 0 15 0 20 ns 4, 6, 7 -15 units notes sym -45 -12 description -25 -20 -35 -17 sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 5 input pulse levels ............................................... vss to 3.0v input rise and fall times .................................................. 3ns input timing reference levels ........................................ 1.5v output reference levels .................................................. 1.5v output load ................................................. see figures 1 and 2 notes 1. all voltages referenced to v ss (gnd). 2. -2v for pulse width < 20ns 3. i cc is dependent on output loading and cycle rates. 4. this parameter is guaranteed but not tested. 5. test conditions as specifed with the output loading as shown in fig. 1 unless otherwise noted. 6. t lzce, t lzwe, t lzoe, t hzce, t hzoe and t hzwe are specifed with cl = 5pf as in fig. 2. transition is measured 200mv from steady state voltage. 7. at any given temperature and voltage condition, t hzce is less than t lzce, and t hzwe is less than t lzwe. 8. we\ is high for read cycle. 9. device is continuously selected. chip enables and output enables are held in their active state. 10. address valid prior to, or coincident with, latest occurring chip enable. 11. t rc = read cycle time. 12. chip enable and write enable can initiate and terminate a write cycle. 13. output enable (oe\) is inactive (high). 14. output enable (oe\) is active (low). 15. asi does not warrant functionality nor reliability of any product in which the junction temperature exceeds 150c. care should be taken to limit power to acceptable levels. fig. 1 output load equivalent fig. 2 output load equivalent data retention electrical characteristics (l version only) ac test conditions description sym min ma x units notes vcc for retention data v dr 2v data retention current vcc = 2.0v i ccdr 2 ma chip deselect to data t cdr 0 ns 4 operation recovery time t r 10 ms 4, 11 conditions ce\ > v cc -0.2v v in > v cc -0.2 or 0.2v sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 5 austin semiconductor, inc. 167 ohms 167 ohms 1.73v 1.73v c=5pf c=30pf q q input pulse levels ...................................................... vss to 3.0v input rise and fall times ......................................................... 3ns input timing reference levels ............................................... 1.5v output reference levels ........................................................ 1.5v output load ................................................. see figures 1 and 2 notes 1. all voltages referenced to v ss (gnd). 2. -2v for pulse width < 20ns 3. i cc is dependent on output loading and cycle rates. 4. this parameter is guaranteed but not tested. 5. test conditions as specified with the output loading as shown in fig. 1 unless otherwise noted. 6. t lzce, t lzwe, t lzoe, t hzce, t hzoe and t hzwe are specified with cl = 5pf as in fig. 2. transition is measured 200mv from steady state voltage. 7. at any given temperature and voltage condition, t hzce is less than t lzce, and t hzwe is less than t lzwe. 8. we\ is high for read cycle. 9. device is continuously selected. chip enables and output enables are held in their active state. 10. address valid prior to, or coincident with, latest occurring chip enable. 11. t rc = read cycle time. 12. chip enable and write enable can initiate and terminate a write cycle. 13. output enable (oe\) is inactive (high). 14. output enable (oe\) is active (low). 15. asi does not warrant functionality nor reliability of any product in which the junction temperature exceeds 150c. care should be taken to limit power to acceptable levels. fig. 1 output load equivalent fig. 2 output load equivalent data retention electrical characteristics (l version only) ac test conditions description sym min ma x units notes vcc for retention data v dr 2v data retention current vcc = 2.0v i ccdr 800 ua chip deselect to data t cdr 0 ns 4 operation recovery time t r 10 ms 4, 11 conditions ce\ > v cc -0.2v v in > v cc -0.2 or 0.2v sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 6 low v cc data retention waveform read cycle no. 1 8, 9 (address controlled, ce\ = oe\ = v il , we\ = v ih ) read cycle no. 2 2 (we\ = v ih ) dont care undefned data retention mode 4.5v 4.5v v dr >2v v dr t cdr t r v cc ce\ v ih - v il - address t rc t oh t aa previous data valid data valid i/o, data in & out valid address t rc t aoe ce\ t lzoe t ace data valid high-z t hzoe t hzce t pd i/o, data in & out icc t lzce t pu sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 7 write cycle no. 1 12 (ce controlled) write cycle no. 2 12, 13 (write enabled controlled) address t wc t cw ce\ t aw data valid t ah t as i/o, data out t wp1 t ds t dh we\ i/o, data in high-z high-z address t wc t cw ce\ t aw data valid t ah t as i/o, data out t wp1 t dh we\ i/o, data in high-z high-z sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 8 write cycle no. 3 7,12, 14 (we controlled) address t wc t cw ce\ t aw data valid t ah t as data out data undefned t wp2 t ds t dh t hzwe t lzwe we\ data in high-z sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 9 44-pin tsopii (package designators dgc & dgcr) mechanical definitions integrated silicon solution, inc. ? www.issi.com ? 1-800-379-4774 rev. f 06/18/03 copyright ? 2003 integrated silicon solution, inc. all rights reserved. issi reserves the right to make changes to this specification and its products at any time without notice. issi assumes no liability arising out of the application or use of any information, products or services described herein. customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. packaging information plastic tsop package code: t (type ii) d seating plane b e c 1 n/2 n/2+1 n e1 a1 a e l zd . notes: 1. controlling dimension: millimieters, unless otherwise specified. 2. bsc = basic lead spacing between centers. 3. dimensions d and e1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. formed leads shall be planar with respect to one another within 0.004 inches at the seating plane. plastic tsop (t - type ii) millimeters inches millimeters inches millimeters inches symbol min max min max min max min max min max min max ref. std. no. leads (n) 32 44 50 a ? 1.20 ? 0.047 ? 1.20 ? 0.047 ? 1.20 ? 0.047 a1 0.05 0.15 0.002 0.006 0.05 0.15 0.002 0.006 0.05 0.15 0.002 0.006 b 0.30 0.52 0.012 0.020 0.30 0.45 0.012 0.018 0.30 0.45 0.012 0.018 c 0.12 0.21 0.005 0.008 0.12 0.21 0.005 0.008 0.12 0.21 0.005 0.008 d 20.82 21.08 0.820 0.830 18.31 18.52 0.721 0.729 20.82 21.08 0.820 0.830 e1 10.03 10.29 0.391 0.400 10.03 10.29 0.395 0.405 10.03 10.29 0.395 0.405 e 11.56 11.96 0.451 0.466 11.56 11.96 0.455 0.471 11.56 11.96 0.455 0.471 e 1.27 bsc 0.050 bsc 0.80 bsc 0.032 bsc 0.80 bsc 0.031 bsc l 0.40 0.60 0.016 0.024 0.41 0.60 0.016 0.024 0.40 0.60 0.016 0.024 zd 0.95 ref 0.037 ref 0.81 ref 0.032 ref 0.88 ref 0.035 ref 0 5 0 5 0 5 0 5 0 5 0 5 symbol ref. ? std. min max min max a ?\? 1.20 ?\? 0.047 a1 0.05 0.15 0.002 0.006 b 0.30 0.45 0.012 0.018 c 0.12 0.21 0.005 0.008 d 18.31 18.52 0.721 0.729 e1 10.03 10.29 0.395 0.405 e? 11.56 11.96 0.455 0.471 e? l 0.41 0.60 0.016 0.024 zd 0 o 5 o 0 o 5 o millimeters inches 0.81?ref 0.80?bsc 0.032?bsc 0.032?ref n=44 leads sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 10 mechanical definitions* micross case #210 (package designator ec) smd 5962-95600, case outline n d e pin 1 identifer area l2 l e b r d1 1 36 *all measurements are in inches. a a1 p sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 9 austin semiconductor, inc. mechanical definitions* asi case #210 (package designator ec) smd 5962-95600, case outline n d e pin 1 identifier area l2 l e b r d1 1 36 min max a 000 0100 a1 0054 0066 b 0022 002 d 010 030 d1 040 060 e 0445 0460 e l l2 0115 0135 p --- 0006 r 000 typ symbol 0100 typ smd specifications 0050 bsc *all measurements are in inches. a a1 p sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 11 mechanical definitions* micross case #307 (package designator f) smd 5962-95600, case outline t bottom view 36 1 c e2 a q *all measurements are in inches. d e b top view d1 s e l pin 1 identifer area sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 10 austin semiconductor, inc. mechanical definitions* asi case #307 (package designator f) smd 5962-95600, case outline t bottom view 36 1 c e2 a q min max a 0.096 0.125 b 0.015 0.022 c 0.003 0.009 d 0.910 0.930 d1 0.840 0.860 e 0.505 0.515 e2 0.385 0.397 e l 0.250 0.370 q 0.020 0.045 symbol 0.050 bsc smd specifications *all measurements are in inches. d e b top view d1 s e l pin 1 identifier area sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 12 ? mechanical definitions* micross case package designator: soj smd 5962-95600, case outline m sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 13 mechanical definitions* micross case #503 (package designator ecj) smd 5962-95600, case outline m *all measurements are in inches. a a1 e b p a2 e2 d e d1 l2 l typ 1 36 sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 12 austin semiconductor, inc. mechanical definitions* asi case #503 (package designator ecj) smd 5962-95600, case outline m *all measurements are in inches. a a1 e b p a2 e2 min max a 0.140 0.160 a1 0.054 0.075 a2 0.025 0.063 b 0.019 0.028 d 0.910 0.939 d1 0.840 0.860 e 0.434 0.460 e2 0.374 0.410 e l 0.050 0.070 l2 0.115 0.135 p --- 0.004 symbol smd specifications 0.050 bsc d e d1 l2 l typ 1 36 sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 14 *all measurements are in inches. mechanical definitions* micross case #903 (package designator dj) sram sram sram sram sram as5c512k8 as5c512k8 rev. 7.0 05/08 austin semiconductor, inc. reserves the right to change products or specifications without notice. 13 austin semiconductor, inc. *all measurements are in inches. mechanical definitions* asi case #903 (package designator dj) sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 15 ordering information *available processes it = industrial temperature range -40 o c to +85 o c xt = extended temperature range -55 o c to +125 o c 883c = full military processing -55 o c to +125 o c **options defintions l = 2v data retention / low power (consult factory) ** l version is not currently an available option for parts in dgc & dgcr package. 36-pin ceramic flat pac k 36-pin ceramic soj package device number package type speed ns options** process device number package type speed ns options** process a s5c512k8 f -12 l / * a s5c512k8 soj [ecj] -12 l / * a s5c512k8 f -15 l / * a s5c512k8 soj [ecj] -15 l / * a s5c512k8 f -17 l / * a s5c512k8 soj [ecj] -17 l / * a s5c512k8 f -20 l / * a s5c512k8 soj [ecj] -20 l / * a s5c512k8 f -25 l / * a s5c512k8 soj [ecj] -25 l / * a s5c512k8 f -30 l / * a s5c512k8 soj [ecj] -30 l / * a s5c512k8 f -45 l / * a s5c512k8 soj [ecj] -45 l / * 36-pin clcc 36-pin plastic soj device number package type speed ns options** process device number package type speed ns options** process a s5c512k8 ec -12 l / * a s5c512k8 dj + -12 l / * a s5c512k8 ec -15 l / * a s5c512k8 dj + -15 l / * a s5c512k8 ec -17 l / * a s5c512k8 dj + -17 l / * a s5c512k8 ec -20 l / * a s5c512k8 dj + -20 l / * a s5c512k8 ec -25 l / * a s5c512k8 dj + -25 l / * a s5c512k8 ec -30 l / * a s5c512k8 dj + -30 l / * a s5c512k8 ec -45 l / * a s5c512k8 dj + -45 l / * 44-pin tsopii - sn/pb lead finish 44-pin tsopii - rohs compliant - nipdau lead finish device number package t yp e speed ns process device number package t yp e speed ns process a s5c512k8 dgc -12 / * a s5c512k8 dgcr -12 / * a s5c512k8 dgc -15 / * a s5c512k8 dgcr -15 / * example: as5c512k8dgc-12/xt example: as5c512k8dgcr-12/it +lead free (pb finish is also available, consult factory) example: as5c512k8f-25/xt example: as5c512k8ec-35/xt example: as5c512k8ecj-15/it example: as5c512k8dj-20/xt *consult factory for ecj package option, soj is new standard. sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 16 micross to dscc part number cross reference for smd 5962-95600* * micross part number is for reference only. orders received referencing the smd part number will be processed per the smd. micross part # smd part # micross part # smd part # as5c512k8ec-12l 5962-9560015qna as5c512k8ecj-12l 5962-9560015qma as5c512k8ec-12l 5962-9560016qna as5c512k8ecj-12l 5962-9560016qma as5c512k8ec-15 5962-9560014qna as5c512k8ecj-15 5962-9560014qma as5c512k8ec-15l 5962-9560013qna as5c512k8ecj-15l 5962-9560013qma as5c512k8ec-20l 5962-9560012qna as5c512k8ecj-20l 5962-9560012qma as5c512k8ec-25l 5962-9560011qna as5c512k8ecj-25l 5962-9560011qma as5c512k8ec-35l 5962-9560010qna as5c512k8ecj-35l 5962-9560010qma as5c512k8ec-45l 5962-9560009qna as5c512k8ecj-45l 5962-9560009qma as5c512k8ec-20 5962-9560004mna as5c512k8ecj-20 5962-9560004mma as5c512k8ec-20l 5962-9560008mna as5c512k8ecj-20l 5962-9560008mma as5c512k8ec-25 5962-9560003mna as5c512k8ecj-25 5962-9560003mma as5c512k8ec-25l 5962-9560007mna as5c512k8ecj-25l 5962-9560007mma as5c512k8ec-35 5962-9560002mna as5c512k8ecj-35 5962-9560002mma as5c512k8ec-35l 5962-9560006mna as5c512k8ecj-35l 5962-9560006mma as5c512k8ec-45 5962-9560001MNA as5c512k8ecj-45 5962-9560001mma as5c512k8ec-45l 5962-9560005mna as5c512k8ecj-45l 5962-9560005mma micross part # smd part # as5c512k8f-12l 5962-9560015qta as5c512k8f-12l 5962-9560016qta as5c512k8f-15 5962-9560014qta as5c512k8f-15l 5962-9560013qta as5c512k8f-20l 5962-9560012qta as5c512k8f-25l 5962-9560011qta as5c512k8f-35l 5962-9560010qta as5c512k8f-45l 5962-9560009qta as5c512k8f-20 5962-9560004mta as5c512k8f-20l 5962-9560008mta as5c512k8f-25 5962-9560003mta as5c512k8f-25l 5962-9560007mta as5c512k8f-35 5962-9560002mta as5c512k8f-35l 5962-9560006mta as5c512k8f-45 5962-9560001mta as5c512k8f-45l 5962-9560005mta micross package designator ec micross package designator ecj micross package designator f sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 17 micross to dscc part number cross reference for smd 5962-95613* * micross part number is for reference only. orders received referencing the smd part number will be processed per the smd. micross part # smd part # micross part # smd part # as5c512k8ec-12/h 5962-9561329hna as5c512k8ecj-12/h 5962-9561329hza as5c512k8ec-12l/h 5962-9561328hna as5c512k8ecj-12l/h 5962-9561328hza as5c512k8ec-15/h 5962-9561314hna as5c512k8ecj-15/h 5962-9561314hza as5c512k8ec-17/h 5962-9561310hna as5c512k8ecj-17/h 5962-9561310hza as5c512k8ec-17l/h 5962-9561324hna as5c512k8ecj-17l/h 5962-9561324hza as5c512k8ec-20/h 5962-9561309hna as5c512k8ecj-20/h 5962-9561309hza as5c512k8ec-20l/h 5962-9561323hna as5c512k8ecj-20l/h 5962-9561323hza as5c512k8ec-25/h 5962-9561308hna as5c512k8ecj-25/h 5962-9561308hza as5c512k8ec-25/h 5962-9561313hna as5c512k8ecj-25/h 5962-9561313hza as5c512k8ec-25l/h 5962-9561322hna as5c512k8ecj-25l/h 5962-9561322hza as5c512k8ec-25l/h 5962-9561327hna as5c512k8ecj-25l/h 5962-9561327hza as5c512k8ec-35/h 5962-9561307hna as5c512k8ecj-35/h 5962-9561307hza as5c512k8ec-35/h 5962-9561312hna as5c512k8ecj-35/h 5962-9561312hza as5c512k8ec-35l/h 5962-9561321hna as5c512k8ecj-35l/h 5962-9561321hza as5c512k8ec-35l/h 5962-9561326hna as5c512k8ecj-35l/h 5962-9561326hza as5c512k8ec-45/h 5962-9561306hna as5c512k8ecj-45/h 5962-9561306hza as5c512k8ec-45/h 5962-9561311hna as5c512k8ecj-45/h 5962-9561311hza as5c512k8ec-45l/h 5962-9561320hna as5c512k8ecj-45l/h 5962-9561320hza as5c512k8ec-45l/h 5962-9561325hna as5c512k8ecj-45l/h 5962-9561325hza as5c512k8ec-55/h 5962-9561305hna as5c512k8ecj-55/h 5962-9561305hza as5c512k8ec-55l/h 5962-9561319hna as5c512k8ecj-55l/h 5962-9561319hza as5c512k8ec-12/h 5962-9561329hnc as5c512k8ecj-12/h 5962-9561329hzc as5c512k8ec-12l/h 5962-9561328hnc as5c512k8ecj-12l/h 5962-9561328hzc as5c512k8ec-15/h 5962-9561314hnc as5c512k8ecj-15/h 5962-9561314hzc as5c512k8ec-17/h 5962-9561310hnc as5c512k8ecj-17/h 5962-9561310hzc as5c512k8ec-17l/h 5962-9561324hnc as5c512k8ecj-17l/h 5962-9561324hzc as5c512k8ec-20/h 5962-9561309hnc as5c512k8ecj-20/h 5962-9561309hzc as5c512k8ec-20l/h 5962-9561323hnc as5c512k8ecj-20l/h 5962-9561323hzc as5c512k8ec-25/h 5962-9561308hnc as5c512k8ecj-25/h 5962-9561308hzc as5c512k8ec-25/h 5962-9561313hnc as5c512k8ecj-25/h 5962-9561313hzc as5c512k8ec-25l/h 5962-9561322hnc as5c512k8ecj-25l/h 5962-9561322hzc as5c512k8ec-25l/h 5962-9561327hnc as5c512k8ecj-25l/h 5962-9561327hzc as5c512k8ec-35/h 5962-9561307hnc as5c512k8ecj-35/h 5962-9561307hzc as5c512k8ec-35/h 5962-9561312hnc as5c512k8ecj-35/h 5962-9561312hzc as5c512k8ec-35l/h 5962-9561321hnc as5c512k8ecj-35l/h 5962-9561321hzc as5c512k8ec-35l/h 5962-9561326hnc as5c512k8ecj-35l/h 5962-9561326hzc as5c512k8ec-45/h 5962-9561306hnc as5c512k8ecj-45/h 5962-9561306hzc as5c512k8ec-45/h 5962-9561311hnc as5c512k8ecj-45/h 5962-9561311hzc as5c512k8ec-45l/h 5962-9561320hnc as5c512k8ecj-45l/h 5962-9561320hzc as5c512k8ec-45l/h 5962-9561325hnc as5c512k8ecj-45l/h 5962-9561325hzc as5c512k8ec-55/h 5962-9561305hnc as5c512k8ecj-55/h 5962-9561305hzc as5c512k8ec-55l/h 5962-9561319hnc as5c512k8ecj-55l/h 5962-9561319hzc micross package designator ec micross package designator ecj sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 18 micross to dscc part number cross reference for smd 5962-95613* * micross part number is for reference only. orders received referencing the smd part number will be processed per the smd. micross part # smd part # as5c512k8f-12/h 5962-9561329hua as5c512k8f-12l/h 5962-9561328hua as5c512k8f-15/h 5962-9561314hua as5c512k8f-17/h 5962-9561310hua as5c512k8f-17l/h 5962-9561324hua as5c512k8f-20/h 5962-9561309hua as5c512k8f-20l/h 5962-9561323hua as5c512k8f-25/h 5962-9561308hua as5c512k8f-25/h 5962-9561313hua as5c512k8f-25l/h 5962-9561322hua as5c512k8f-25l/h 5962-9561327hua as5c512k8f-35/h 5962-9561307hua as5c512k8f-35/h 5962-9561312hua as5c512k8f-35l/h 5962-9561321hua as5c512k8f-35l/h 5962-9561326hua as5c512k8f-45/h 5962-9561306hua as5c512k8f-45/h 5962-9561311hua as5c512k8f-55/h 5962-9561305hua as5c512k8f-55l/h 5962-9561319hua as5c512k8f-45l/h 5962-9561320hua as5c512k8f-45l/h 5962-9561325hua as5c512k8f-12/h 5962-9561329huc as5c512k8f-12l/h 5962-9561328huc as5c512k8f-15/h 5962-9561314huc as5c512k8f-17/h 5962-9561310huc as5c512k8f-17l/h 5962-9561324huc as5c512k8f-20/h 5962-9561309huc as5c512k8f-20l/h 5962-9561323huc as5c512k8f-25/h 5962-9561308huc as5c512k8f-25/h 5962-9561313huc as5c512k8f-25l/h 5962-9561322huc as5c512k8f-25l/h 5962-9561327huc as5c512k8f-35/h 5962-9561307huc as5c512k8f-35/h 5962-9561312huc as5c512k8f-35l/h 5962-9561321huc as5c512k8f-35l/h 5962-9561326huc as5c512k8f-45/h 5962-9561306huc as5c512k8f-45/h 5962-9561311huc as5c512k8f-55/h 5962-9561305huc as5c512k8f-55l/h 5962-9561319huc as5c512k8f-45l/h 5962-9561320huc as5c512k8f-45l/h 5962-9561325huc micross package designator f sram as5c512k8
as5c512k8 rev. 7.5 01/13 micross components reserves the right to change products or specifcations without notice. 19 document title 512k x 8 sram high speed sram with revolutionary pinout revision history rev # history release date status 7.1 updated 36 lead soj drawing september 2008 release 7.2 added micross information january 2010 release 7.3 expanded package offering to include march 2011 release copper lead frames and rohs compliancy, pages 1&14, changed elect. char. limits: from: to : i ccsp 225ma for all speeds 100ma for -12,-15 & -17 90ma for -20 & -25 80ma for -35 70ma for -45 i cclp 180ma for all speeds 75ma for -12,-15 & -17 65ma for -20 & -25 60ma for -35 50ma for -45 i sbtsp 60ma for all speeds 20ma for all speeds i sbtlp 30ma for all speeds 10ma for all speeds i sbcsp 25ma for all speeds 15ma for all speeds i sbclp 10ma for all speeds 5ma for all speeds i li 10a 2a c i 12pf 8pf c o 14pf 10pf t ah 1ns for all speeds 0ns for all speeds t hzwe 25ns -35 & 30ns -45 15ns -35 & 20ns -45 7.4 updated data retention electrical august 2012 release characteristics (l version only) i ccdr max. from 800 ua to 4.5 ma 7.5 updated data retention electrical january 2013 release characteristics (l version only) i ccdr max. from 4.5ma to 2ma sram as5c512k8

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